User defined Data types

User-Defined Datatype

The Advantage of System Verilog has the user Defined Data Types, They are

» Typedef
» Enum
» Union
» Struct
» Class

TypeDef datatype:

The User can define a new type using typedef

typedef int intY;

This can then be instantiated as:

intY a, b;

A type can be used before it is defined, provided it is first identified as a type by an empty typedef:

typedef foo;
foo f = 1;
typedef int foo;

Note that this does not apply to enumeration values, which must be defined before they are used. User defined type identifiers have the same scoping rules as data identifiers, except that hierarchical reference to type identifiers shall not be allowed. References to type identifiers defined within an interface through ports are allowed provided they are locally re-defined before being used.

type declaration ::=
interface intf_i;
typedef int data_t;
endinterface
module sub(intf_i p)
typedef p.data_t my_data_t;
my_data_t data; // type of ’data’ will be int when connected to interface above
endmodule

NOTE:
typedef enum type_declaration_identifier;
typedef struct type_declaration_identifier;
typedef union type_declaration_identifier;
typedef class type_declaration_identifier;
typedef type_declaration_identifier;