Interfaces - Ports

Interfaces - Ports

One limitation of simple interfaces is that the nets and variables declared within the interface are only used to connect to a port with the same nets and variables. To share an external net or variable, one that makes a connection from outside of the interface as well as forming a common connection to all module ports that instantiate the interface, an interface port declaration is required. The difference between nets or variables in the interface port list and other nets or variables within the interface is that only those in the port list can be connected externally by name or position when the interface is instantiated.

interface port(input x, output y, inout z);
wire p;
endinterface

Modports:

To restrict interface access within a module, there are modport lists with directions declared within the interface.

The keyword modport indicates that the directions are declared as if inside the module.

interface if;
reg p, q, r, s;
modport i1 (input p, q, output r, s);
modport i2 (output p, q,input r, s);
endinterface :if

Interfaces and specify blocks:

The specify block is used to describe various paths across a module and perform timing checks to ensure that events occurring at the module inputs satisfy the timing constraints of the device described by the module. The module paths are from module input ports to output ports and the timing checks are relative to the module inputs. The specify block refers to these ports as terminal descriptor. Module inout ports can function as either an input or output terminal. When one of the port instances is an interface, each signal in the interface becomes an available terminal, with the default direction as defined for an interface, or as restricted by a modport.

A ref port cannot be used as a terminal in a specify block. The following shows an example of using interfaces together with a specify block:

interface itf;
logic c,q,d;
modport flop (input c,d, output q);
endinterface
module dtype (itf.flop ch);
always_ff @(posedge ch.c) ch.q <= ch.d;
specify
( posedge ch.c => (ch.q+:ch.d)) = (5,6);
$setup( ch.d, posedge ch.c, 1 );
endspecify
endmodule