Technology development in MOSFET

Layout

[edit]Cellular structure

This Power MOSFET has a meshed gate, with square cells

The gate layout of this MOSFET is constituted of parallel stripes.

As described above, the current handling capability of a power MOSFET is determined by its gate channel width. The gate channel width is the third (Z-axis) dimension of the cross-sections pictured.

To minimize cost and size, it is valuable to keep the transistor's die area size as small as possible. Therefore, optimizations have been developed to increase the width of the channel surface area (i.e increase the "channel density"). They mainly consist of creating cellular structures repeated over the whole area of the MOSFET die. Several shapes have been proposed for these cells, the most famous being the International Rectifier's "Hexfet" (hexagonal shape).

Another way to increase the channel density is to reduce the size of the elementary structure. This allows for more cells in a given surface area, and therefore more channel width. However, as the cell size shrinks, it becomes more difficult to ensure proper contact of every cell. To overcome this, a "strip" structure is often used (see figure). It is less efficient than a cellular structure of equivalent resolution in terms of channel density, but can cope with smaller pitch.

[edit]Structures

[edit]P-substrate power MOSFET

A P-substrate MOSFET (often referred to as PMOS) is a MOSFET with opposite doping types (N instead of P and P instead of N in the cross-section in figure 1). This MOSFET is made using a P-type substrate, with a P^- epitaxy. As the channel sits in a N-region, this transistor is turned on by a negative gate to source voltage. This makes it desirable in a buck converter, where one of the terminals of the switch is connected to the high side of the input voltage: with a N-MOSFET, this configuration requires to apply to the gate a voltage equal to V_in + V_GS, whereas no voltage overV_in is required with a P-MOSFET.

The main disadvantage of this type of MOSFET is the poor on-state performance: it uses holes as charge carriers, which have a much lower mobilitythan electrons. As resistivity is directly related to mobility, a given PMOS will have a R_DSon three times higher than a N-MOSFET with the same dimensions.

[edit]VMOS

The VMOS structure has a V-groove at the gate region

This structure has a V-groove at the gate region and was used for the first commercial devices ^[3].

[edit]UMOS

The UMOS has a trench gate. It is intended to increase the channel density by making the channel vertical

In this Power MOSFET structure, the gate electrode is buried in a trench etched in the silicon. This results in a vertical channel. The main interest of the structure is the absence of the JFET effect. The name of the structure comes from the U-shape of the trench.

[edit]CoolMOS

Especially for voltages beyond 500V some manufacturers, most notably Infineon Technologies, have begun to use a charge compensation principle. Thus the resistance in the epitaxial layer as biggest contributor in high voltage MOSFETs can be reduced by a factor >5.