On-State Characteristics

On-state resistance

Fig.2: Contribution of the different parts of the MOSFET to the on-state resistance.

When the power MOSFET is in the on-state (see MOSFET for a discussion on operation modes), it exhibits a resistive behaviour between the drain and source terminals. It can be seen in figure 2 that this resistance (called R_DSon for "drain to source resistance in on-state") is the sum of many elementary contributions:

• R_S is the source resistance. It represents all resistances between the source terminal of the package to the channel of the MOSFET: resistance of the wire bonds, of the source metallisation, and of the N⁺ wells;
• R_ch. This is the channel resistance. It is directly proportional to the channel width, and for a given die size, to the channel density. The channel resistance is one of the main contributors to the R_DSon of low-voltage MOSFETs, and intensive work has been carried out to reduce their cell size in order to increase the channel density;
• R_a is the access resistance. It represents the resistance of the epitaxial zone directly under the gate electrode, where the direction of the current changes from horizontal (in the channel) to vertical (to the drain contact);
• R_JFET is the detrimental effect of the cell size reduction mentioned above: the P implantations (see figure 1) form the gates of a parasitic JFETtransistor that tend to reduce the width of the current flow;
• R_n is the resistance of the epitaxial layer. As the role of this layer is to sustain the blocking voltage, R_n is directly related to the voltage rating of the device. A high voltage MOSFET requires a thick, low-doped layer (i.e. highly resistive), whereas a low-voltage transistor only requires a thin layer with a higher doping level (i.e. less resistive). As a result, R_n is the main factor responsible for the resistance of high-voltage MOSFETs;
• R_D is the equivalent of R_S for the drain. It represents the resistance of the transistor substrate (note that the cross section in figure 1 is not at scale, the bottom N⁺ layer is actually the thickest) and of the package connections.

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Breakdown voltage/on-state resistance trade-off

Fig. 3: The R_DSon of the MOSFETs increase with their Voltage rating.

When in the OFF-state, the power MOSFET is equivalent to a PIN diode (constituted by the P ⁺ diffusion, the N^- epitaxial layer and the N⁺ substrate). When this highly non-symmetrical structure is reverse-biased, the space-charge region extends principally on the light-doped side, i.e over the N^- layer. This means that this layer has to withstand most of the MOSFET's OFF-state drain-to-source voltage.

However, when the MOSFET is in the ON-state, this N^- layer has no function. Furthermore, as it is a lightly-doped region, its intrinsic resistivity is non-negligible and adds to the MOSFET's ON-state Drain-to-Source Resistance (R_DSon) (this is the R_nresistance in figure 2).

Two main parameters govern both the breakdown voltage and the R_DSon of the transistor: the doping level and the thickness of the N^- epitaxial layer. The thicker the layer and the lower its doping level, the higher the breakdown voltage. On the contrary, the thinner the layer and the higher the doping level, the lower the R_DSon (and therefore the lower the conduction losses of the MOSFET). Therefore, it can be seen that there is a trade-off in the design of a MOSFET, between its voltage rating and its ON-state resistance. This is demonstrated by the plot in figure 3.

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Body diode

It can be seen in figure 1 that the source metallization connects both the N⁺ and P implantations, although the operating principle of the MOSFET only requires the source to be connected to the N⁺ zone. However, if it were, this would result in a floating P zone between the N-doped source and drain, which is equivalent to a NPN transistor with a non-connected base. Under certain conditions (under high drain current, when the on-state drain to source voltage is in the order of some volts), this parasitic NPN transistor would be triggered, making the MOSFET uncontrollable. The connection of the P implantation to the source metallization shorts the base of the parasitic transistor to its emitter (the source of the MOSFET) and thus prevents spurious latching.

This solution, however, creates a diode between the drain (cathode) and the source (anode) of the MOSFET, making it able to block current in only one direction.