Switching Operation

Because of their unipolar nature, the power MOSFET can switch at very high speed. Indeed, there is no need to remove minority carriers as with bipolar devices.

The only intrinsic limitation in commutation speed is due to the internal capacitances of the MOSFET (see figure 4). These capacitances must be charged or discharged when the transistor switches. This can be a relatively slow process because the current that flows through the gate capacitances is limited by the external driver circuit. This circuit will actually dictate the commutation speed of the transistor (assuming the power circuit has sufficiently low inductance).

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Capacitances

In the MOSFETs datasheets, the capacitances are often named C_iss (input capacitance, drain and source terminal shorted), C_oss (output capacitance, gate and source shorted), and C_rss (reverse capacitance, gate and source shorted). The relationship between these capacitances and those described below is:

Where C_GS, C_GD and C_DS are respectively the gate-to-source, gate-to-drain and drain-to-source capacitances (see below). Manufacturers prefer to quote C_iss, C_oss and C_rss because they can be directly measured on the transistor. However, as C_GS, C_GD and C_DS are closer to the physical meaning, they will be used in the remaining of this article.

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Gate to source capacitance

The C_GS capacitance is constituted by the parallel connection of C_oxN+, C_oxP and C_oxm (see figure 4). As the N⁺ and P regions are highly doped, the two former capacitances can be considered as constant. C_oxm is the capacitance between the (polysilicon) gate and the (metal) source electrode, so it is also constant. Therefore, it is common practice to consider C_GSas a constant capacitance, i.e its value does not depend on the transistor state.

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Gate to drain capacitance

The C_GD capacitance can be seen as the connection in series of two elementary capacitances. The first one is the oxide capacitance (C_oxD), constituted by the gate electrode, the silicon dioxide and the top of the N epitaxial layer. It has a constant value. The second capacitance (C_CDj) is caused by the extension of the space-charge zone when the MOSFET is in off-state (see the section Blocking Voltage). Therefore, it is dependent upon the drain to source voltage. From this, the value of C_GD is:

The width of the space-charge region is given by ^[1]

where ε_Si is the permittivity of the Silicon, q is the electron charge, and N is the doping level. The value of C_GDj can be approximated using the expression of the plane capacitor:

Where A_GD is the surface area of the gate-drain overlap. Therefore, it comes:

It can be seen that C_GDj (and thus C_GD) is a capacitance which value is dependent upon the gate to drain voltage. As this voltage increases, the capacitance decreases. When the MOSFET is in on-state, C_GDj is shunted, so the gate to drain capacitance remains equal to C_oxD, a constant value.

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Drain to source capacitance

As the source metallization overlaps the P-wells (see figure 1), the drain and source terminals are separated by a P-N junction. Therefore, C_DS is the junction capacitance. This is a non-linear capacitance, and its value can be calculated using the same equation as for C_GDj.