Coverage - Examples

Coverage - Examples

Example for Coverage

(a) Ethernet

(i) Example

program Eth_cov;
bit x;
class Eth;
bit [63:0] header;
bit [0:15] frmlength;
bit clk;
covergroup cov1 @(posedge clk); // embedded covergroup
coverpoint frmlength
{
bins normal = { [1000:1536] };
bins normal_low = { [46:999] };
bins normal_d[] = default;

}
coverpoint header;
endgroup
function new();
cov1 = new();
endfunction

task clk_gen();
forever clk = #10 ~clk;
endtask
task pkt();
forever
begin
#10;
frmlength = frmlength+1;
header = header+2;
$display ($time," display the clock =%b header =%d frmlength =%d",clk,header,frmlength);
end
endtask
endclass
initial
begin
Eth ram;
ram = new();
fork ram.clk_gen;
ram.pkt;
#5000 $finish(); //Change Run time to increase COV
join_any
end
endprogram

Output in VCS

10 display the clock =1 header = 2 frmlength = 1
20 display the clock =0 header = 4 frmlength = 2
30 display the clock =1 header = 6 frmlength = 3
40 display the clock =0 header = 8 frmlength = 4
50 display the clock =1 header = 10 frmlength = 5
60 display the clock =0 header = 12 frmlength = 6
.
.
.
.
4940 display the clock =0 header = 988 frmlength = 494
4950 display the clock =1 header = 990 frmlength = 495
4960 display the clock =0 header = 992 frmlength = 496
4970 display the clock =1 header = 994 frmlength = 497
4980 display the clock =0 header = 996 frmlength = 498
4990 display the clock =1 header = 998 frmlength = 499

(ii) Example (2)

Program Eth_frm;
typedef enum bit {FALSE, TRUE} bool;
typedef enum {TOO_SHORT, SHORT, MEDIUM, LONG, TOO_LONG} eth_length_t;

class ethernet_frame_sized_payload;
rand bool legal_size;
rand eth_length_t ltype;
rand bit [15:0] tag_info;
constraint c2 {tag_info <= 1536;}
rand int unsigned data_size;
constraint c3 {{(legal_size)== (data_size==tag_info);}
{(ltype ==TOO_SHORT) -> (data_size inside {[1:45]});}
{(ltype ==SHORT) -> (data_size inside {[46:800]});}
{(ltype ==MEDIUM) -> (data_size inside {[801:1200]});}
{(ltype ==LONG) -> (data_size inside {[1201:1536]});}
{(ltype ==TOO_LONG) -> (data_size inside {[1536:2000]});}}
event eth_cov;
rand byte data [];
covergroup frame @(eth_cov);
coverpoint data_size {
bins frm_short = {[46:800]};
bins frm_medium = {[801:1200]};
bins frm_toolong = {[1536:2000]};
}
cov_tag: coverpoint tag_info;
cov_legal: coverpoint legal_size;
cross_cov: cross cov_tag,cov_legal; //cross coverage of tag_info and legal size
endgroup

function new();
frame = new();
endfunction;

task cov();
$display(" tag_info %h legal_size %h ltype %h " ,tag_info, legal_size,ltype);
endtask
endclass
initial
begin
ethernet_frame_sized_payload frm;
frm = new();
repeat(5)
begin
frm.randomize();
->frm.eth_cov;
frm.cov();
#100;
end
end
endprogram

Output in VCS

tag_info 0020 legal_size 0 ltype 00000002
tag_info 0499 legal_size 0 ltype 00000000
tag_info 053e legal_size 1 ltype 00000003
tag_info 01ca legal_size 1 ltype 00000001
tag_info 0536 legal_size 0 ltype 00000000




(b) Sonet

(i) Example

module coverage1();
logic [7:0] frame_data;
logic par,control ;
covergroup
parity_data @ (posedge control);
parity : coverpoint par {
bins even = {0};
bins odd = {1};
}
endgroup
// Instance of covergroup parity_data
parity_data par1 = new();
// Task to put data
task
put_data (input [7:0] data);
#10 control = 1;
frame_data = data;
par = ^data;
$display("@%2tns frame_data %x, parity %x", $time,data,par );
#10 control = 0;
frame_data = 0;
par = 0;
endtask
// Testvector generation
initial
begin
control = 0;
repeat (6);
begin
put_data ( $random);
end
#10 $finish;
end
endmodule

Output in VCS

@10ns frame_data 24, parity 0
@30ns frame_data 81, parity 0
@50ns frame_data 09, parity 0
@70ns frame_data 63, parity 0
@90ns frame_data 0d, parity 1
@110ns frame_data 8d, parity 0

(ii) Example

interface sonet;
logic req,gnt;
bit [773:0] payload;
bit [9:0] poh;
logic clk;
endinterface

module
section_tr(sonet data_in, input bit clk);
endmodule

module
signal_tr(sonet data_out, input bit clk);
endmodule

module top;
logic clk=0;
sonet frm_intf();
section_tr se_tr(frm_intf,clk);
signal_tr si_tr(.data_out(frm_intf),.clk(clk));
class Tranction;
covergroup sonet_cov @clk;
coverpoint frm_intf.payload
{
bins payload_high = {[0:100]};
bins payload_med = {[200:1000]};
bins others [] = default;
}
endgroup
function new();
sonet_cov = new();
endfunction
endclass
always
clk = #20 ~clk;
initial
begin
int count =0;
Transaction txr= new();
repeat (2)
begin
#10
frm_intf.payload = count;
count = count+1;
#100 $finish;
end
end
endmodule