VHDL code for MUX

VHDL Templates

The multiplexer, or 'MUX' as it is usually called, is a simple construct very common in hardware design. The example below demonstrates a simple two to one MUX, with inputs A and B, selector S and output X:

-- template 1:

X <= A when S = '1' else B;
 
-- template 2:

with S select X <= A when '1' else B;
 
-- template 3:

process(A,B,S)

begin

  case S is

    when '1'    => X <= A;

    when others => X <= B;

  end case;

end process;

 

-- template 4:

process(A,B,S)

begin

  if S = '1' then

    X <= A;

  else

    X <= B;

  end if;

end process;
 

-- template 5 - 4:1 MUX, where S is a 2-bit std_logic_vector :

process(A,B,C,D,S)

begin

  case S is

    when "00"   => X <= A;

    when "01"   => X <= B;

    when "10"   => X <= C;

    when others => X <= D; 

  end case;

end process;