baud rate transmitter program
module baudtransmitter(bclk,sysclk,rst,tdre,loadtdr,dbus,settdre,txd);
input bclk,sysclk,rst,tdre,loadtdr;
input [7:0]dbus;
output settdre,txd;
parameter idle=2'b00,synch=2'b01,tdata=2'b10;
reg [8:0]tsr;
reg [7:0]tdr;
reg [3:0]bct;
reg [1:0] state, nextstate;
reg inc, clr,loadtsr,shfttsr,start ,bclkdelayed;
wire bclkrising;
assign txd=tsr[0];
assign settdre=loadtsr;
assign bclkrising = bclk & (! bclkdelayed);
always@(state,tdre,bct,bclkrising)
begin
inc=1'b0; clr=1'b0; loadtsr=1'b0; shfttsr=1'b0; start=1'b0;
case(state)
idle: if(tdre==1'b0)
begin
loadtsr=1'b1;
nextstate=synch;
end
else nextstate=idle;
synch: if( bclkrising==1'b1 ) begin
start=1'b1;nextstate=tdata;
end
else nextstate=synch;
else if(bct != 4'b1001)begin shfttsr=1'b1; inc=1'b1; nextstate=tdata; end
else begin clr=1'b1; nextstate=idle;end
endcase
end
always@( posedge sysclk or negedge rst)
begin
if(!rst)
begin
tsr=8'b11111111; state=idle; bct=1'b0; bclkdelayed=1'b0;
end
else
begin
state=nextstate;
if(clr==1'b1) bct=4'b0000;
else if (inc==1'b1) bct=bct+4'b0001;
if(loadtdr==1'b1) tdr=dbus;
if(loadtsr==1'b1) tsr={tdr,1'b1};
if(start==1'b1) tsr[0]=1'b0;
if(shfttsr==1'b1) tsr={1'b1 , tsr[8:1]};
bclkdelayed=bclk;
end
end
endmodule
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